Fundamental Differences between Intel and AMD

Cache design is one area where Intel chips and AMD chips traditionally differ. Levels of cache can be organized as either “inclusive” or “exclusive”. Inclusive means a copy of L1 cache exists in L2, and a copy of L2 cache exists in L3. Exclusive means there are no copies of cache, so each level is unique. Intel processors, like a Mexican resort, are all-inclusive. Just like said resorts though, there’s always a catch - even though Intel added 2mb of cache to the P4, you’re not actually adding two more megabytes to your usable cache, only 1.5mb.

AMD uses exclusive cache, where cache is separated at each level. So if one has 1024k of L2, 64k of L1 data, and 64k of L1 instruction, they actually have a total of 1152k. Does this mean that Intel’s cache is inferior? It can go either way. You’re still getting more total cache with the Intel approach, and there are many other pros and cons that factor into the equation. Inclusive cache is a lot easier to implement than exclusive, but exclusive is significantly faster. In fact, if there’s a cache miss on an AMD chip, and the data must be found in memory, the data will go directly into L1 and only go to L2 if is retired from L1. There is a slight increase in logic overhead though; this comes from mapping channels to all levels of cache instead of just to the highest level, and the need to figure out where everything is. With inclusive, if something is in L1, you know it’s everywhere (so L3 or L2 doesn’t need to probe a lower level to figure out what goes where) and synchronization is a breeze.