Quantcast

Forum Login

feed image
Directory Articles Technology Previews

Caching In: P4 Extreme Edition PDF Print E-mail
Article Index
Caching In: P4 Extreme Edition
The Basics
Under the Hood
Intel and AMD
Where Everything Is
In The End

 

Author: Nigel Woodford
 

cash

About a month ago Intel upgraded its Pentium 4 processor line by adding 2 megabytes of L3 cache to the processor core. This new “Extreme Edition” sports just a slight performance increase over its predecessors, and as such

 

Intel will have a hard time convincing gamers and enthusiasts to choose it over the AMD Athlon 64 FX. However, cache is an extremely important and often overlooked part of processor architecture. We here at Fastsilicon.com have decided to take an inside look at cache, and show some fundamental differences in the way it is used in the Pentium and Athlon architectures.

When most people hear the word "cache", they think of lottery winnings, dead presidents, and a sudden jump in the popularity of the color peach. In this context though, cache is a small chunk of memory that resides on the processor itself, giving extremely quick access to processor instructions and data. Thanks to cache, the part of the processor that actually executes the instructions doesn’t even need to think about getting at this stuff, and with hard coded logic like branch-prediction and pre-fetching, data is already good to go before the processor even knows it needs it.

One great breakthrough of the Pentium 4 Extreme Edition is it brings Level 3 cache to desktop Pentium processor; something that previously only the privileged high-end Xeon processors possessed. Before we get into describing what this magic L3 cache actually brings to the table, let’s take a step back and talk about memory in general.

For many applications, the biggest bottleneck is memory. Combine that with the fact that memory technology is one of the slowest areas of technological development, and one can see why cache is so important. Memory is out there in the fields of our motherboard; containing a multitude of bits, each waiting to be the lucky winner to travel onto the system bus, thru the Northbridge, and into the processor itself. This extremely long and unpredictable trip is a huge bottleneck in nearly every high performance system. Waiting on a request from memory is like waiting for Doom 3 to be released. You know its coming, you hope it’s soon, but you really don’t know when you’re going get it.

Enter cache memory. Cache doesn’t increase the speed of the processor itself, but it does drastically reduce memory latency. Cache is a clever attempt to take the contents of some of that slow and unpredictable memory that the processor needs and have it bypass the entire system bus. The processor itself can directly access cache so it doesn’t have to wait for processor instructions or data when it needs to do something. There also aren't any clock cycles wasted on waiting, as cache access is done at the speed of the processor itself, not at the speed of the system bus. In order for cache to be really effective though, it has to be structured in a sophisticated way. To this end, chip designers came up with a hierarchal approach that can give the processor just what it needs and keep on giving it - without extraneous load on the processor itself.


 
© 2003-2008 Fastsilicon Media. All Rights Reserved